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What you'll be doing:
Own the development and implementation of ATE test content for our Data Center silicon product line.
Develop and maintain project plans to strictly adhere to market delivery timelines.
Impact GPU manufacturing yields, minimize excess, and contribute to business administration efforts by accurately predicting test durations and analyzing characterization outcomes.
Manage key vendor relationships, particularly with Foundry, Assembly and Memory vendors, ensuring flawless collaboration and delivery.
Collaborate closely with Supply and Demand program management to meet and exceed chip quality levels.
What we need to see:
Bachelor or Master's degree in Electrical Engineering, Computer Engineering, or equivalent experience.
7+ years of direct PDE experience
Strong problem-solving skills and a proven track record in ASIC Mixed Signal design, characterization, and qualification of BIST and SCAN DFT methodologies.
Knowledgeable in advanced Silicon Process technology such as FinFET
Hands-on experience inChip-On-Wafer-On-SubstrateAssembly, Silicon GPU Product Engineering, and HBM Memory vendor management.
Excellent interpersonal skills for effective multi-functional and cross-company collaboration.
Ways to stand out from the crowd:
Demonstrates comprehensive understanding of HBM testing methodology.
Possesses in-depth knowledge of assembly stacking processes and vendor management.
Has a strong grasp of all aspects of GPU characterization, wafer and final test DFT coverage.
You will also be eligible for equity and .
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