Nvidia Senior CPU Power Architect 

United States, California 

561496571

What you’ll be doing:

• Pre-silicon Power Estimation: Model and estimate CPU power at C-model, RTL, and netlist stages using industry-standard tools.

• Power Optimization: Identify inefficiencies and drive design improvements in collaboration with architects, RTL designers, and PD engineers.

• Test Development: Create targeted power characterization tests (e.g., peak power, di/dt stress patterns) for both simulation and silicon.

• Silicon Validation: Measure CPU power and performance in the lab; correlate silicon results with pre-silicon estimates to refine models.

• Cross-functional Collaboration: Partner with multiple engineering disciplines to achieve optimal power efficiency without compromising performance.

What we need to see:

• BS/MS in EE, CE, or CS or equivalent experience.

• 3+ years of experience working in ASIC power measurement and optimization.

• Strong understanding of leakage and dynamic power in VLSI circuits

• Experience with RTL and netlist power analysis tools such as Power Artist, PrimeTime PX, or equivalent.

• Familiarity with CPU microarchitecture (CPU pipeline design, out-of-order execution, cache hierarchy, branch prediction) and understanding of microarchitectural power model.

Ways to stand out from the crowd:

• Proficiency in Python for automation and data analysis.

• Experience with DVFS, clock gating, power gating, and multi-voltage domain design.

• Knowledge of lab instrumentation for power measurement.

• Strong communication skills for cross-team technical discussions.