Amazon ASIC Formal Verification Engineer Intern Annapurna Labs 

United States, Texas, Austin 

560535386

As a member of the Machine Learning Acceleration team you will be responsible for defining and checking the specification of critical hardware modules using formal methods and industrial model checkers.
You will be a part of a world class pre-silicon hardware design team. The job entails understanding requirements of specific hardware blocks and writing functional descriptions of correct behavior. Specifications are written in hardware description languages like Verilog and System Verilog Assertions (SVA). Using industrial model checkers you will then learn techniques for proving the hardware being designed matches the modeled specification. Advances proof techniques, such as modeling abstractions, and inductive reasoning will be utilized. Automation techniques and scripting flows are also leveraged to accelerate proof techniques.Mentorship & Career GrowthWork/Life Harmony

- Currently enrolled in a Bachelor’s degree program or higher in Electrical Engineering, Computer Engineering, Computer Science or related fields with a graduation conferral date between December 2025 and September 2026
- Completed coursework or prior internship experience with formal methods (SW/HW)
- Coursework or prior internship experience in the basics of computer architecture.

- Experience or previous technical internship(s) with hardware model checkers: JasperGold, or VC Formal.
- Experience or previous technical internship(s) with RTL: Verilog or VHDL.
- Knowledge of declarative programming languages: Ocaml, Haskell.
- Experience with scripting languages, such as Python, or TCL.
- Ability to effectively articulate technical challenges and solutions
- Adept at handling ambiguous or undefined problems as well as ability to think abstractly