Through mentorship, you will develop verification components, create test plans, and engage closely with members of cross-functional disciplines to gain practical experience in building a power management IC.
Verification of sub-circuits against specification
Definition of verification plans to ensure coverage of specified features
Analysis of simulation results and debugging designs
Active participation in cross functional collaboration
Writing behavioural/functional models for sub-blocks
Currently pursuing a BS, MS, or PhD in Computer Science, Electrical Engineering, Computer Engineering, Electrical and Computer Engineering, or a related field.
You must be enrolled as a student for the full duration of the internship.
Eagerness to learn new things and take up challenges
Strong analytical and problem solving skills
Basic understanding of analog circuitry and digital design
Full English language fluency (verbal and written)
Knowledge of a scripting language
Familiarity with Verilog / Verilog-AMS / SystemVerilog