ARM Senior Functional Validation Engineer 

United States, Texas, Austin 

544513181

Functional Validation engineers in this group are responsible for driving validation specifications & methodology and deliver on the validation of subsystems for the next generation of compute solution. Working in a highly focused group, you will help validate our next generation compute solutions using innovative technologies, methodologies and tools. You will work closely with architecture, design, verification, Implementation, modelling, performance analysis, SW development, FPGA and Board development engineers.

As a creative engineer with a demonstrated knowledge of SoC Validation containing multi core CPU/GPU subsystems as well as high speed interfaces like PCIe/CXL, DDRx/LPDDRx, HBM etc. you will be owning validation of IP/ complex subsystems in systems’ environment and developing robust validation methodology for subsystems/solutions.

• 5 to 12 Years of Experience.
• You will need experience of silicon validation for multiple sophisticated SoCs /ASICs containing multi core CPU/GPU subsystems as well as high speed interfaces like PCIe/CXL, DDRx/LPDDRx, HBM etc.
• Your ability to make trade-offs between power, performance and area will be vital
• You possess the expertise knowledge of developing Validation test content using C, C++ etc.
• Exposure to all stages of Silicon Validation will be crucial, including use-case validation.
• Exposure to producing validation specifications and documentation describing sophisticated designs.
• Expert-level knowledge in Computer Architectures and Systems.
• Practical experience of working on Processor based system designs
• Knowledge of shell programming/scripting (e.g. Tcl Perl, Python etc.)

• Deeper understanding of CPU/ GPU/ Media subsystem in SoC environment and proven expertise in owning validation requirements & Validation Plan.
• Deeper Understanding of High speed peripheral controller validation like PCIe/CXL, DDRx/LPDDRx, HBM, Ethernet.
• Hands on Experience in validating multiple sub systems for ASICs/ SoCs in system environment ( across Emulation, FPGA and Development/Eval board), owning all phases of validation ( Test development, Execution and Debug) for owned sub systems.
• Understanding of SoC security aspects.