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What you’ll be doing:
Silicon bringup, validation, and debug NVIDIA’s multiple HSIOs, including NVLink and NVLink-C2C.
Profiling HSIO workloads on key use cases such as MLPerf on single and multi-node Datacenter products.
Investigate HSIO power features, datapath analysis, and electrical for the next generation of products.
Power feature char and tuning for key use cases, balancing performance and power.
What we need to see:
BS or MS degree in EE/CE or equivalent experience
5+ years working on bringup, validation, or design of HSIOs (eg: PCIE/CXL, DDR, USB, UCIE)
Experience with HSIOs like PCIE or chip-to-chip interconnects including understanding of process/temp/voltage sensitivity.
Understanding of HSIO power management
Understanding of firmware/driver structures and their interaction with Hardware.
Strong EE fundamentals, knowledgeable in computer architecture, high speed interfaces, timing analysis, process variations, statistical error rates and power analysis.
Enjoy working in a collaborative environment.
You will also be eligible for equity and .
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