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Microsoft Senior SoC Hardware Analog/Power Validation Engineer 
United States, Oregon, Hillsboro 
53574652

20.11.2024

Required Qualifications:

  • 7+ years of related technical engineering experience
    • OR Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience or internship experience
    • OR Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience or internship experience
    • OR Doctorate degree in Electrical Engineering, Computer Engineering, Computer Science, or related field.
  • Applied understanding of Computer Architecture and CPU/SoC validation principles, including: Understanding of SoC power delivery, subsystem, SoC system level, and platform level functionality and writing scripts/software with industry standard languages like Python or C/C++.

Other Requirements:

  • Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter.

Preferred Qualifications:

  • Proficient communication, collaboration and teamwork skills and ability to lead, grow, and contribute to diverse and inclusive teams.
  • Verification, logic development, analog validation, or validation tools experience as part of aCentral Processing Unit(CPU), System on Chip(SoC) and/or IP development team.
  • Leadership skills.
  • Demonstrated validation experience in one or more of the following: Validation of:
    • Electrical: Serdes,Input Output(IO), SOC power delivery and Voltage Regulator(VR) optimization, bandgap circuits
    • Power and Performance
    • Automation, Content Creation, or Tools/Scripts Development
  • Ability to develop synthetic SoC validation Core, Coherency, Memory, and IO content to run on both bare metal andOperating System(OS)environments.
  • Ability to develop sophisticated tools/scripts to support SoC validation debug activities such as maximum power, current transients, and register dumps.
  • Understanding of board level schematics.
  • Understanding system level software and firmware.
  • Experience running silicon content on pre-silicon platforms such as emulation orField-Programmable Gate Array(FPGA).
  • Demonstrated success in hardware/software debug efforts.
  • Hands on experience debugging silicon failures using on chip debug features (like trace orJoint Action Test Group(JTAG)) as well as test equipment (like oscilloscopes, protocol analyzers, bit error rate testers, logic)

Certain roles may be eligible for benefits and other compensation. Find additional benefits and pay information here:

Microsoft will accept applications for the role until November 30, 2024.

Responsibilities

The Silicon computing development team is seeking aSenior SoC Hardware (Analog/Power) Validation Engineerto join the post-silicon validation (including functional, electrical, and power/performance aspects) team for our projects. This new team will be involved in numerous projects within Microsoft developing custom silicon for a diverse set of systems. We are responsible for delivering cutting-edge, custom SoC designs that can perform complex and high-performance functions in the most efficient manner. As a
Senior SoC Hardware (Analog/Power) Validation Engineerin this high impact role on the team, you will:

  • Own post-silicon validation of one of the following areas electrical/analog, or power/performance.
  • Define, guide, and contribute to the implementation of silicon debug tools and capabilities.
  • Become proficient on the overall architecture, implementation of complex power delivery /features/flows and their interactions with other parts of the SoC, with the platform, and with software.
  • Provide technical guidance, coaching, and mentorship to other engineers in your areas of experience.
  • Develop validation strategy, requirements, environments, tools, and methodologies including debug board and hardware/software requirements.
  • Apply your knowledge of validation principles and techniques and your judgement to write test plans and implement them by developing test content, scripts, tools and other validation collateral.
  • Execute content in post-silicon, triage and debug failures.
  • Apply your growth mindset to learn and adapt in a complex and dynamic environment.
  • Engage with partners to drive continuous improvement to the design, to validation plans/collateral, and methodology to prevent, reduce, and/or find bugs sooner, more easily, or more reliably.
  • Apply your One Microsoft mentality to collaborate with and influence architects, logic designers, verification engineers, other post-silicon validators, and Intellectual Property(IP) and tool providers.
  • Delight your customers by providing high quality results on schedule.
  • Provide technical leadership with respect and integrity.
  • Apply your experience towards pre-silicon verification plans, tests, and debug of your area.
  • Other
    • Embody our