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Google Physical Verification Full-Chip Implementation Engineer Israel, Tel Aviv District, Tel Aviv-Yafo 532921656
01.09.2024
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Info Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Tel Aviv, Israel; Haifa, Israel.Note: By applying to this position you will have an opportunity to share your preferred working location from the following:.
- Bachelor's degree in Electrical Engineering, Chemical Engineering, Physics, Chemistry, Material Science, a related field, or equivalent practical experience.
- 4 years of experience in ASIC physical design flows and methodologies in advanced process nodes.
- 3 years of experience in software development, or 1 year of experience with an advanced degree.
- Experience with one or more synthesis/PnR tools (e.g., Genus, Innovus, DC, ICC).
- Experience in high-performance synthesis, PnR, sign-off convergence, including STA and sign-off optimizations.
Preferred qualifications:
- Experience in low power design Implementation including Common Power Format (CPF)/Unified Power Format (UPF), multi-voltage domains, power gating.
- Experience in floor planning and block integration.
- Experience with ASIC design flows and methodology of Physical design.
- Experience in engineering across physical design, top-level implementation, GDS tape-out.
- Understanding of Circuit design, device physics and deep submicron technology.
- Excellent skills in scripting languages such as Python, Tcl, or Perl.
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