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Google Senior Silicon Pre-to-Post Validation Lead Raxium United States, California, Fremont 529370638
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Minimum qualifications:
Preferred qualifications:
- Bachelor's degree in Electrical Engineering or a related field, or equivalent practical experience.
- 10 years of experience in analog circuit design, including simulation and verification.
- Experience working with relevant Electronic Design Automation (EDA) tools for circuit design and analysis.
Preferred qualifications:
- 15 years of experience in Application-Specific Integrated Circuit/System on Chip (ASIC/SoC) design, with a focus on both digital logic design and Design for Testability (DFT) implementation.
- Experience with industry-standard EDA tools for synthesis, Static Timing Analysis (STA), and DFT.
- Experience with advanced DFT techniques such as hierarchical DFT, compression, and diagnosis.
- Proficiency in hardware description languages (Verilog, SystemVerilog).
- Excellent problem-solving, investigative, communication and teamwork skills and abilities.
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