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Nvidia Senior System Power Performance Validation Engineer Israel, North District 525087010
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What you will be doing:
STA analysis of blocks/top-level according to specifications under challenging constraints targeting for the best power, area, and performance.
Be exposed and work on a variety of challenging designs (including high cell count and HS blocks). Resolving complex timing and congestion problems.
Daily work involves all aspects of static timing analysis - constraints, environment, models generation and timing ECO generation for block level and full chip level.
Taking part inflows development.
What we need to see:
B.SC. in Electrical Engineering/Computer Engineering.
2-3 years of experience as STA engineer.
Ability to quickly adapt to new technology and go deep into new areas
Strong communication skills
Great teammate.
Drive new solutions based on any issues that arise
Ways to Stand Out From the Crowd:
Knowledge in physical design flows and methodologies (PNR, STA, physical verification).
Familiarity with physical design EDA tools (such as Synopsys, Cadence, etc.).
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