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Google RTL Design Verification Lead Silicon 
India, Karnataka, Bengaluru 
518404624

20.02.2025
Minimum qualifications:
  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or equivalent practical experience.
  • 18 years of experience with digital logic design principles, RTL design concepts or verification methodologies and languages such as Universal Verification Methodology (UVM) and SystemVerilog.
  • Experience in leading design development or functional verification team in Intellectual Property (IP) development for SoCs including Power, Performance and Area characterizations and optimizations.

Preferred qualifications:
  • Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or equivalent practical experience.
  • 10 years of experience in people management.
  • Experience in leading Silicon solutions development in multimedia or security or other System on a chip (SoC) integrated IPs.
  • Experience in managing architecture specification to define Micro-architecture and its RTL implementation and verification through constrained random testbenches.
  • Knowledge of Application-Specific Integrated Circuit (ASIC) development life-cycle: architectural specification, vendor engagement, packaging, post-silicon validation, and system integration.