Nvidia ASIC Design Engineer 

United States, California 

516147102

doing:

• As a member of our Memory Subsystem Design team, you will collaborate with architects/design verification/formalverification/physicaldesign team to deliver a world-class solution. NVIDIA SOC Interconnects are among the industry's most sophisticated because of the complex area, latency, power, bandwidth and quality-of-service requirements.

• In this position, you will have the opportunity to be responsible for the micro-architecture and design including RTL design, synthesis and timing analysis using innovative CAD tools and using the latest process technologies.
  

see:

• MS/Phd in Electrical Engineering or Computer Engineer or related degree (or equivalent experience).

• 3+ years of relevant industry experience and a background in high-speed coherent interconnects, protocol bridges, hardware-managed coherency and system level caches.

• Experience with multiple clock domains and asynchronous interfaces

• Knowledge of industry specifications like CHI/CXL/PCI-E is a plus.

• Experience with all stages in the ASIC design flow including emulation, prototyping, DFT, timing analysis, floor planning, ECO, bringup & lab debug, and ATE test development.

• Strong working knowledge of Verilog or VHDL.

• Scripting language like PERL.

• Good communication skills and interpersonal skills are required. A history of mentoring junior engineers and interns is a plus.