ARM Senior Engineer Frontend Flows & Methodologies 

India, Karnataka, Bengaluru 

513117375

• Define, implement, and maintain methodologies for CDC, RDC, Lint, and CLP analysis.
• Ensure RTL quality through static analysis, debugging, and architectural alignment.
• Collaborate with design teams to interpret specifications and resolve RTL/System Verilog issues.
• Support and maintain flows for analyzing infrastructure IPs and NoC architectures.
• Automate static checks and integrate them into development flows using Python scripting.
• Handle and collaborate using version control systems like Git.

• Expertise in static analysis tools for CDC, RDC, Lint, and CLP.
• Strong experience in delivering clean, high-quality RTL code.
• Ability to interpret and implement architectural and functional specifications.
• Familiarity with infrastructure IPs and Network-on-Chip (NoC) designs.
• Solid understanding of RTL design and debugging with System Verilog.
• Proficiency in Git for version control.
• Scripting experience in Python for tool automation and flow improvement.

• Exposure to front-end integration tools and design methodologies.
• Strong interest and skill in flow development and automation.
• Experience with IP management using IPXACT.
• Understanding of behavioral and synthesized model correlation.

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• Originality and resourcefulness
• Team and personal development
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