Qualcomm ASIC Design Verification Engineer Santa Clara CA 

United States, California 

509340872

Job Area:

Engineering Group, Engineering Group > ASICS Engineering

Qualifications:

• Minimum 3 years of DV experience using uvm/assertion based verification technologies

• Experience in verifying complex SOC or SOC subsystems

• Experience with caches and DDR memory protocol verification

• Experience with using memory verification VIP's

• Exposure to DDR phy

• Exposure to firmware/driver development using c++ Exposure with multiple succesfull tapeouts from conception to post silicon debug

• Exposure to Formal verification

• Exposure to PASIM simulations

• Exposure to perf and power verification.

Skill proficiency: UVM, system verilog, assertion, C++, python

DDR, CACHE, SOC

Minimum Qualifications:

• Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.

Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience.

PhD in Science, Engineering, or related field.

Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.

Pay range:

$108,000.00 - $177,500.00