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Intel Altera Senior Ethernet MAC/PCS IP Design Engineer 
India, Karnataka, Bengaluru 
508731091

02.09.2024

• Develop Micro Architecture and Design implementation for Ethernet MAC/PCS IPs and subsystems
• Work closely with the Architects to come up with an optimal design
• RTL code development, involvement in pre Silicon and post Silicon debug
• Own up all the frontend collaterals for the IP/subsystem including STA Timing constraints, CDC, Lint etc

Designs and develops the logic, register transfer level (RTL) coding for High-Speed Ethernet MAC/PCS IPs


Qualifications
  • The candidate should be strong in Ethernet MAC/PCS IP design, knowledge of IEEE 802.3 standard
  • Should possess strong Digital Design fundamentals
  • Experience in Micro Architecture and Design implementation
  • Strong knowledge of coding complex designs in Systemverilog/Verilog
  • 8-12 years of relevant experience
  • Strong Knowledge of Networking domain with exposure to different standard protocols
  • Should be a Bachelor's/Masters degree holder from a reputed institute
  • Should possess system level understanding for debugging Simulations and post Silicon issues
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