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Google SoC Design/Integration Senior Engineer TPU Google Cloud India, Karnataka, Bengaluru 499341996
06.03.2025
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Minimum qualifications:
Preferred qualifications:
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
- 8 years of experience in ASIC development with Verilog/SystemVerilog, VHDL.
- Experience in ASIC design verification, synthesis, timing/power analysis, and Design for Testing (DFT).
- Experience in one or more SoC integration domains and flows (e.g., clocking, debug, fabrics, security, or low power methodologies).
Preferred qualifications:
- Experience with scripting languages (e.g., Python or Perl).
- Experience in System on a Chip (SoC) designs and integration flows.
- Knowledge of bus architectures, processor design, accelerators, or memory hierarchies.
- Knowledge of high performance and low power design techniques.
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