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Google Interposer Physical Design Engineer 
United States, California, Sunnyvale 
487160364

01.12.2024
Minimum qualifications:
  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
  • 10 years of experience in ASIC physical design flows and methodologies in advanced process nodes.
  • Experience with routing through custom routing or PnR tool routing.
  • Experience with layout, physical verification, Design for Manufacturability (DFM), power and signal integrity analysis using industry standard tools.
  • Experience with Controlled-Collapse Chip Connection (C4) bumps, micro bumps, Deep Trench Capacitor (DTC), Through-silicon via (TSV) etc.

Preferred qualifications:
  • Experience with leading one or more aspects of interposer or package design.
  • Experience in extraction of design parameters, Quality of Results (QoR) metrics, and analyzing trends.
  • Knowledge of techniques for testing and debugging interposer designs, including electrical and thermal.
  • Knowledge of semiconductor device physics and transistor characteristics.
  • Understanding of thermal considerations for 3D stacked dies and interposers.