Share
The Role:
In this role you will:
• Implement state of the art verification environments to facilitate testing of RTL at both block and chip-levels
• Incorporate reference Matlab/C models in verification environments
• Develop detailed test plans and write tests, run regressions, collect coverage matrices and report progress to the program
• Run formal verification of complex blocks to ensure functional correctness
• Work with the design and communication systems team and participate in system level verification using test benches constructed using UVM, System C and DPI-C
• Develop a highly automated environment to run regressions that can be used to make builds and maintain organization of the databaseExport Control Requirement:
• Bachelor's degree in Electrical / Communications Engineering or Computer Science, or related field, or equivalent experience
• 7+ years in verification preferably in communication systems
• Proven track record where products have gone to volume production, preferably 1st pass Silicon
• Experience in UVM, Verilog, System Verilog, C and scripting
• Master's or Ph.D degree in Electrical / Communications Engineering
• 10+ years in digital verification
• Hands on experience working closely with Systems team on verifying algorithm (DSP or MODEM) implementations
• Familiarity with Matlab
• Familiarity with formal verification techniques
• Strong written and verbal skills
These jobs might be a good fit