Your role and responsibilities
• Responsible for high performance microprocessor blocks RTL to GDSII implementation
• Perform block level synthesis, floor-planning, placement and routing.
• Close the design to meet timing, power budget and area.
• Implement ECO's to address functional bugs and timing violations.
• Team player, with good problem solving and communication skills.
Required education
Bachelor's Degree
Preferred education
Master's Degree
Required technical and professional expertise
- 5-8 years industry experience in physical design methodology.
- Good knowledge and hands on experience in physical design methodology which include logic synthesis,placement, clock tree synthesis, routing .
- Should be knowledgeable in physical verification ( LVS,DRC.. etc), Noise analysis, Power analysis and electro migration .
- Team player with good problem solving skills, communication skills and leadership skills.
Preferred technical and professional experience
- Automation skills in PYTHON, PERL ,SKILL and/or TCL
