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Apple Emulation Engineer 
United States, California, Cupertino 
478149559

28.03.2024
Key Qualifications
  • Experience with Verilog, VHDL design
  • Experience with Design Verification and System Verilog, UVM, and C/C++ verification environments
  • Emulation experience on available platforms, Palladium, Veloce, or Zebu, including compilation, debug, performance and throughput tuning.
  • Experience writing scripts using Perl, Python, Makefile Experience with waveform debug tools, Verdi/SimVision
  • Strong communication skills and ability to work as a team
Description
As a member of SOC emulation team you will be involved in: -Support and enable multiple Emulation environments by developing infrastructure using the latest emulation techniques-C/C++ DPI Transactors, Accelerated UVM Testbenches, SV assertions, Coverage, Power Estimation, SpeedBridges-SoC and IP bringup on emulation, root cause UVM and SoC CPU test and emulator environment issues -Role requires close collaboration with Design, DV, Power, Silicon Validation, Performance and Software teams. --Design, debug, communication and teamwork skills are essential -Work with the leading emulation vendors to debug issues, enhance capabilities
Education & Experience
Bachelor's degree and a minimum of 3 years relevant industry experience
Pay & Benefits
  • At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $138,900.00 and $256,500.00, and your base pay will depend on your skills, qualifications, experience, and location.Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.