Marvell Senior Staff Static Timing Analysis & Physical Design Engineer 

United States, Idaho, Boise 

477954556

The Signal Integrity Engineering Group (SIE) is a one-stop shop for all matters related to signal/power integrity (SI/PI), board design, and package design.

What You Can Expect

• Lead PCB design for system projects, working collaboratively with Hardware, System, Signal/Power Integrity, and Electrical Testing teams.
• Responsible for product definition, system design, evaluation, testing, and guiding through manufacturing to lab bring-up.
• Proficiency in SERDES technologies, including PCIe Gen3/4/5 and Ethernet interfaces(25G/50Gbps/100Gbps).
• Oversee design phases—architecture, component selection, schematic entry, board layout, and bring-up.
• Work closely with board development, DVT, and SI teams to meet design goals; coordinate with ODM partners.
• Lead the entire design lifecycle, from initial definition to manufacturing and post-manufacturing bring-up.
• Provide input for device design requirements and collaborate with various teams to meet project objectives.

What We're Looking For

• 10+ years as an Electrical Engineer in high-speed digital or analog circuitry, specializing in complex high-density PCB assemblies (ethernet switches,microcontrollers/processors).
• 5+ years’ experience collaborating with Original Design Manufacturers.
• BS in Electrical Engineering with 10+ years of relevant experience.
• Proficiency in high-speed designs, including DDR4, PCIe Gen3/4, and Ethernet (10G/25G/50G/100G).
• Strong knowledge of power supply design and hands-on measurement skills, with a proven track record in delivering completed designs.
• Understanding of mechanical and thermal components in board design.
• Familiarity with signal and power integrity implementation on PCBs.
• Experience with Cadence Allegro for schematics and layout; strong analysis and problem-solving skills.
• Detail-oriented, driven by urgency and accountability, and supports ideas with data.