Responsibilities- As a creative design engineer with a knowledge of subsystems and SoCs you will be part of a team developing logic for our innovative high-performance compute and AI solutions.
 - You will work as part of the design team to understand and review the SoC architecture and develop the design specifications which meet leading complex power/performance goals. Your key responsibilities will include crafting design micro-architecture specifications, developing the RTL, fixing bugs, running design checks and contributing to the generation of implementation constraints.
 - You will also work closely with the verification team to review test plans and help debug design issues and with the performance/power analysis teams to evaluate and improve SoC performance/power.
 - As part of the design team you will contribute to developing and enhancing the design methodologies used by the team.
 - You will mentor and support other members of the team to enable the successful completion of project activities.
 - You will balance other opportunities such as working with Project Management on plans and schedules
 
Required Skills & Experience:In addition to bringing your accomplishment of either Bachelors or Master’s degree in Computer Science or Electrical/Computer Engineering or a similar related field and 10+ years experience working in design of complex compute subsystems or SoCs, you will need:
- Experience in digital hardware design for complex systems using Verilog HDL.
 - Experience with power and clock domain crossing and with static design checks like linting, CDC/RDC, X-propagation
 - Exposure to all stages of design: initial concept, specification, implementation, power and performance analysis, power optimization, testing, documentation and support
 - Experience or knowledge in synthesis, timing constraints, power management techniques
 - Experience collaborating with the verification team on design quality closure
 - Experience with Perl, Python or other scripting language
 - Leadership, mentoring or coaching experience
 
"Nice to Have" Skills and Experience:- Experience with ARM-based designs and/or ARM System Architectures
 - Experience with SystemVerilog and verification methodologies – UVM/OVM/e
 - Experience with UPF, IP-XACT
 - Experience leading teams or projects
 - Experience developing and integrating subsystems for PCIe, UCIe, DDR/LPDDR/HBM, Ethernet etc.
 - Understanding of DFT topics: RTL testability, scan insertion, OCC
 
Salary Range:$220,400-$298,200 per year