Solid understanding of industry standard analog IC design tools (Cadence schematic capture, simulation, layout)
Proven experience taking projects from the concept phase, through design and layout, tapeout, to silicon validation, ATE and qualification, and finally into high volume mass production
Ability to navigate the hierarchy of design schematics, inspect critical analog layouts, and run circuit simulations
Ability to run design verification CAD flows (e.g., electro-migration, IR drop, floating node checks, LVS, DRC)
Working knowledge of post-layout extracted simulations and the influence of parasitics on circuit performance
Strong background in power IC electrical specifications
Deep understanding of semiconductor device physics, IC processing fundamentals, ESD, latch-up, and electrical overstress
Strong working knowledge of CMOS, DMOS and BJT device models
Strong background in lab measurement analysis for power integrated circuits (validation)
Experience with ATE development support and production testing of high volume power ICs
Experience with peer review of circuit designs in a team setting (Design Reviews)
Experience working with multi-functional teams (System Engineering, IC layout, lab validation, ATE, Qual/Rel, Architecture)
Working knowledge of device safe operating area (SOA), PDN effects on device stress, and hot carrier injection (HCI)
Understanding of digital design fundamentals, and how they pertain to analog mixed-signal circuit designs
Education & Experience
MSEE and several years (10 years+) in Analog Design required Design Management experience preferred
Additional Requirements
Apple is an Equal Opportunity Employer that is committed to inclusion and diversity. We also take affirmative action to offer employment and advancement opportunities to all applicants, including minorities, women, protected veterans, and individuals with disabilities. Apple will not discriminate or retaliate against applicants who inquire about, disclose, or discuss their compensation or that of other applicants.