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Apple RFIC Layout Automation Engineer United States, California, Sunnyvale 459633455
08.06.2025
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In this role, - You will identify and review repetitive layout tasks and propose innovative solutions to streamline layout processes. - You will be using AI/ML methods to detect inefficiencies, automate tasks, and optimize layout methodologies. - You will diagnose sophisticated verification (DRC/LVS) and PDK issues using Cadence and Calibre, applying advanced tools to enhance accuracy and accelerate resolution.- You are expected to collaborate with design and layout teams, to understand design constraints and define effective automation strategies.- You will apply programming and machine learning techniques to resolve layout challenges, drive improvement initiatives, and continuously evolve release flows as design kits and methodologies advance.
- BS and a minimum of 10 years of relevant industry experience is require.
- You have extensive knowledge of Cadence Virtuoso and Mentor Calibre.
- Proficiency in skill scripting is required, along with experience in Python, Perl, or similar scripting languages preferred.
- You will have a strong understanding of sub-micron CMOS technologies (16nm, 7nm, and below), including FinFET structures, guard rings, deep N-wells, PN junctions, and advanced process effects such as LOD, WPE, and DFM, is essential.
- You are familiar with layout trade-offs involving matching, parasitic effects, high-frequency routing, isolation, coupling, shielding, RC delay, EM, IR, ESD, and latch-up.
- You will bring in excellent communication skills and has the ability to work collaboratively within multi-functional teams.
- MSEE degree is helpful.
- You have consistent track record crafting custom analog layouts, including floorplanning, placement, routing, and verification.
- You are experienced in Calibre SVRF programming and over 5 years of hands-on experience with sophisticated DRC, ERC, and LVS verification and debugging is preferred.
- You are familiar with AI-driven approaches to verification and layout optimization.
- You have experiences in custom layouts at the chip, block, and device level, especially for RF high-frequency circuits such as LNAs, mixers, VCOs, and PLLs is a plus.
Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
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