Bachelor’s degree in Electrical Engineering, Computer Engineering, Physics, a related field, or equivalent practical experience.
4 years of experience working in a signal integrity technical environment, or 3 years of experience with an advanced degree.
Preferred qualifications:
Master's or PhD degree in Electrical Engineering, Computer Engineering, Physics, or a related field.
1 year of experience in technical leadership.
Experience with Allegro, ADS, MATLAB, PowerDC, PowerSI, HFSS, SIwave, and CST.
Experience with SerDes testing in a lab setting, and familiarity with PCIE, DDR, SATA, and Ethernet standards. Understanding of state-of-the-art SERDES capabilities, and of FEC and its implications for system design.
Experience with product development process for mass volume production design, with a focus on signal integrity and lab validation.
Familiarity with PCB, connector, or cable design and assembly processes, including materials and component selection.