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Engineer inValidation (FV)to validatentel’s processors and platforms. The group is part of “Validation Engineering”
Debug Tools
As aDebug Tools enabling Engineer you willstate of the artdebug tools.were developed to debugmicroprocessors silicon.
The workengagement withto define the Debug features,the debug tool that will exercise those HW debug capabilities.
engineer will developmostly written in Python. He willthe HW DFD (capabilities in pre-silicon and post silicon environments.
- Graduate degree in SW engineering or Electrical Engineering (BSEE/CSEE/BSC in SW)- 4 years of experience in applying technical solutions or in validation in environments that include HW and SW.-Experience in development and validation of SW tools for validation or debug- Experienced with SW architecture of SW products and with the development industry procedures related to them (CI/CD, packaging, releasing)
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