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Apple System-level Formal Verification models Hardware IPs M/F/D 
Germany, Bavaria, Munich 
452044138

04.04.2024
Key Qualifications
  • Knowledge of Object Oriented Programming
  • Knowledge of Verilog and/or VHDL
  • Passionate about mathematics
  • Scripting language knowledge (perl/python)
  • Good written and verbal communication skills
  • Experience in working with international teams
  • You are available for 6 months or more
Description
Learn about formal verification techniques (model checking)Define and Design system-level formal verification frameworkPerform case study analysisEmploy the new approach to the project execution flow
Education & Experience
Currently enrolled in a Master’s degree or equivalent experience in Computer Science or equivalent