ARM Principal Engineer 

India, Karnataka, Bengaluru 

432198327

Your responsibilities will involve developing challenging electrical signoff methodologies. These methodologies will balance accuracy and yield on silicon.

The following are the immediate challenges we will be working on as a team:

• We will develop a Static Timing Analysis flow that is standardized and is usable by all silicon groups within Arm
• We will work on strengthening our methodologies to analyze static and dynamic IR drop on the SoC. We will release a qualified flow that enable STA with back annotated voltage
• Electromigration analysis at the SoC level is another key responsibility of this role. Including Local thermal effects as part of electromigration analysis is a key criteria!
• Soft Error rate is a key concern for Infrastructure and Automotive SoC's. We will develop methodologies to analyze and alleviate the impact of Soft Error rate on SoC's

• Experience in developing Signoff methodologies such as Aging, STA, EM IR in advanced process nodes.
• Experience in collaborating across silicon engineering groups in your organization as well as with EDA vendors
• Work experience of 8-12 years in Physical Implementation and Signoff methodologies
• Must have worked on methodology development on 5nm or 3nm technologies
• Strong data analysis skills to fetch data, analyze and provide practical insights

• Bachelors in Electrical Engineering
• Coding skills in Python or R or an equivalent language
• Strong presentation skills