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Google Design Verification Engineering Lead Silicon United States, California, Mountain View 422130172
15.07.2024
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Minimum qualifications:
Preferred qualifications:
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
- 5 years of experience with verification methodologies and languages such as UVM and SystemVerilog.
Preferred qualifications:
- Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
- Experience in low-power design verification.
- Experience with multimedia IPs such as display or video codec, accelerator IPs.
- Experience with SOC integration and sub-system verification.
- Experience in verification of CPU based designs and sub-systems.
- Knowledge of Verification methodologies and formal verification.
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