Intel SOC DFT Design Engineer 

Malaysia, Penang 

41980991

Key Responsibilities:Design and implement comprehensive DFT solutions for SOCs, including scan insertion, boundary scan, built-in self-test (BIST), and memory test solutions. Work closely with the design and verification teams to integrate DFT techniques into SOC design flows. Specify and implement various test methodologies, including scan chains, JTAG, ATPG (Automatic Test Pattern Generation), and fault simulation. Support the integration of advanced test features like power-on reset testing, JTAG, and functional tests.
Optimize test coverage to ensure complete validation of the SOC's functionality. Work with verification engineers to define test patterns and ensure that all logic in the SOC is thoroughly tested. Perform post-silicon validation to ensure that DFT features work as expected.Work closely with the SOC design and validation teams to troubleshoot and resolve DFT-related issues during the design, simulation, and testing phases. Assist in the development and execution of DFT strategy documentation and design guidelines. Provide technical support for manufacturing test, including support for yield analysis, failure analysis, and root-cause diagnosis.

Qualifications:

Education:

• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field.

Experience:

• 3+ years of experience in SOC design, DFT, or related fields.
• Solid understanding of digital design and experience with ASIC/SOC design flows.
• Hands-on experience with DFT methodologies, including scan insertion, boundary scan, BIST, and memory testing.
• Experience with industry-standard tools like Synopsys DFT tools (e.g., DFT Compiler, TetraMAX) or Mentor Graphics tools (e.g., Tessent).
• Familiarity with the JTAG and IEEE 1149.1 standard.
• Proficient in scripting languages (e.g., TCL, Perl, Python) to automate design flows and tests.

Skills and Competencies:

• Strong problem-solving skills and the ability to troubleshoot complex design issues.
• Knowledge of SOC architecture, RTL design, and verification methodologies.
• Excellent communication skills and the ability to work effectively in a collaborative, cross-functional team.
• Detail-oriented with strong analytical and debugging skills.

Desirable Skills:

• Experience in pre-silicon verification or post-silicon validation.
• Familiarity with advanced test techniques like Logic BIST, Memory BIST, and Analog/Mixed-Signal testing.
• Knowledge of fault models and fault simulation for functional and structural testing.
• Experience with FPGA-based prototyping and emulation for SOC testing

Experienced HireShift 1 (Malaysia)Malaysia, PenangMalaysia, Kulim