Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
5 years of technical experience in physical design disciplines involving power delivery and advanced process technology nodes.
Experience with power grid integrity (EMIR) from budgeting to analysis to verification and signoff.
Experience using EMIR tools (e.g., RedHawk-SC, Totem, Voltus).
Preferred qualifications:
Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
Experience owning EMIR at the block or full-chip level, including proactive floorplanning and defining standard cell usage with physical design owners.
Experience establishing EMIR budgets, defining signoff methodologies, and bringing up EMIR flows for new projects.
Experience with power delivery voltage droop mitigation
Familiarity with low power design techniques (e.g., multiple threshold voltage/power/voltage domain design, clock gating, power gating, Dynamic Voltage Frequency Scaling).