Nvidia ASIC Verification Engineer 

India, Telangana, Hyderabad 

413418292

What you'll be doing

• As a member of our team, You will build "state of the art" verification test benches and methodologies to verify DFT features in complexIP's/Sub-systems/SOC's.

• Develop and own verification environment using UVM or equivalent.

• Your responsibility will include to build reusable bus functional models, monitors, checkers and scoreboards.

• Own functional coverage driven verification closure and own design verification sign-offs at multiple levels.

• Collaborate closely with multi-functional teams like chip architecture, ASIC design, functional verification, and post silicon teams.

• Will be part of innovation to strive to improve the quality of DFT methods

What we need to see

• BSEE with 3+ or MSEE with 2+ years of experience in DFT verification or related domains

• Strong expertise in 1149.X or 1500, DFT scan architecture, DFT clocking, and Design for debug.

• Expertise in System Verilog and verification methodologies like UVM/VMM.

• Expertise in prototyping, verification and debug tools (Emulation, FPGA, VCS, Debussy, Formality, PrimeTime etc).

• Good exposure to ASIC design methodologies: RTL design, clocking, timing and low-power architectures.

• Strongprogramming/scriptingskills in C++, Perl, Python or Tcl

• Excellent written and oral communication skills

• Excitement to work on rare challenges

• Strong analytical and problem solving skills

Ways to stand out from the crowd

• Strong experience or interest in both DFT and RTL Verification domains

• Knowledge in Formal verification methodologies and tools for IP and SoC level verification

• Hands-on experience in post silicon debug on ATE and/or system labs.