Preferred Experience & Skill set:
- Experience in Pre (+Post) Si functional validation
- Strong programming (C/C++) skills and Automation scripting (Python, Perl) expertise
- Extensive protocol knowledge of CAN/TSN/Ethernet/I2C/SPI/UART and any one of HSIO (PCIe/USB/DDR)
- Extensive experience with board/platform-level (Hardware & Software) debug
- Extensive experience with HW debug techniques and methodologies (FPGA and ASIC)
- Extensive experience with common lab equipment debug tools including JTAG, Logic Analyzer, Oscilloscope, etc.
Responsibilities include:
- Reading, Defining, documenting, executing and reporting the overall functional test plan and verification strategy for IPs
- Supporting the debug of IP functional failure found during Pre and Post-Silicon validation, bring-up and production phases of Silicon programs
- Lab-based silicon bring-up and validation focused on the functionality
- In-Depth testing of IP features using troubleshooting methods, software tools, protocol/logic analyzers, oscilloscopes and other test equipment
- Engaging in system-level debug/triage efforts
- Leading collaborative technical discussions to drive resolution on technical issues and roll out technical initiatives
- Continuous improvement and developing knowledge of system architecture/debug of IPs
- Supporting debug effort for defects found on customer platforms as requested by customer support teams
- Driving technical innovation to enhance capabilities in IP functional validation, including tool and script development, and organization level technical initiatives
- Python expertise and FPGA Prototyping knowledge
Minimum Qualifications:Masters or B.E / B.tech in Computer Architect/VLSIRequirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.