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Broadcom VLSI Technical SOC/TOP Level Design Integration Engineer India, Karnataka 412065518
05.05.2024
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VLSI Design SOC/TOP level engineer with
He/she should have strong knowledge of following
- Verilog RTL/System Verilog coding
- SOC/Top-Level integration flows ( integrating multiple IPs and associated, clock domains )
- Synthesis ( DC ) and Timing Concepts (STA)
- Spyglass ( lint, DFT, PM, CLK/RST, CDC)
- Formal Verification , Conformal LEC)
- Perl scripting
CAD Tools : Cadence/Synopsys
Mandatory skills :SOC/Top-Level Design
Optional Domains skills : Any networking protocol ,Ethernet, PICe or CPU
Education Qualification : Bachelor’s/Master’s in Electronics/Computer Engg
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