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You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Minimum Qualifications:
Bachelor in Electrical Engineering, Computer Engineering, Computer Science or a related field with 2+ years of experience or Master degree with 1+ years experience in the following :
Research in formal verification domain RTL languages like System Verilog or VHDL Assertion languages like SVA.
Preferred Qualifications:
Experience with the fundamentals of formal verification technology, including model checking and writing formal assertions to express architectural intent of designs, Formal verification principles and methods, Computer architecture, digital design and verification methods
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing BenefitsThese jobs might be a good fit