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Job Area:
Engineering Group, Engineering Group > CPU Engineering
Position: Server Power Management Architect
The ideal candidate will have extensive knowledge of CPU and SoC power management architecture for datacenter SoCs, including experience in microarchitecture and design of power management components for a modern SoC. Strong analytical, problem-solving, and communication skills are essential for excelling in this position.
Minimum Qualifications
Bachelor's degree in Computer Science/Engineering, Electrical Engineering, or a related field.
Over 10 years of experience in power management of CPU and/or SoCs, and at least 5 years of experience with a high-performance server chip
Strong expertise in power management of a high-performance system including management of active power, idle low power and silicon/system limits
Experience in power delivery systems including multi-phase bucks and LDOs
Strong fundamentals in digital ASIC design and power of CMOS circuits
Strong technical documentation skills, along with excellent written and verbal communication abilities.
Preferred Qualifications
Master's in Computer Science/Engineering, Electrical Engineering, or related field.
15+ years in CPU and/or SoC architecture.
Experience in TDP (thermal design power) capping and control
Experience in measurement and management of over-current and voltage droop events
Experience in developing solutions for power and performance telemetry
Strong understanding of silicon test methodologies for power and thermal optimization
Experience in designing SoCs for systems using off-the-shelf PMICs
Proven track record in hyperscale data center solutions
Familiarity with high performance and low power design techniques
Key Responsibilities
Work with chip architects to understand architecture concept and high level system requirements
Collaborate with HW, SW and FW architects to develop an optimal end-to-end power management architecture
Execute System level power modeling for server use cases and analyze trade-offs
Drive convergence of SoC and board power grid definition
Architect SoC and system level power rail sequencing
Collaborate with Thermal engineers to optimize implementation
Must have good communication skills and able to work in dynamic environment with top level engineers and technologists
Create detailed architecture specification documents
Minimum Qualifications:
• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 8+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience.
Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 7+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience.
PhD in Electrical Engineering, Computer Engineering, Computer Science, or related field and 6+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience.
Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.
$233,000.00 - $349,600.00
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