Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
Experience with industry-standard tools, languages and methodologies relevant to the development of silicon-based ICs and chips.
Experience with SystemVerilog (i.e., SystemVerilog Assertions or functional coverage).
Preferred qualifications:
Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture, or a related field.
4 years of experience in design verification.
Experience verifying digital logic at Register-Transfer Level (RTL) using SystemVerilog for Application-Specific Integrated Circuits (ASICs).
Experience in power aware verification, gate level simulations, and post silicon bring-up.
Familiarity with ASIC standard interfaces and memory system architecture.