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Google Silicon Design Lead Devices Services United States, California, Mountain View 378758546
24.06.2024
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Info Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Mountain View, CA, USA; San Diego, CA, USA.Note: By applying to this position you will have an opportunity to share your preferred working location from the following:.
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
- 8 years of experience with RTL design using Verilog/System Verilog and microarchitecture.
- 4 years of experience in people management, leading IP/SoC design team for low power SoCs.
- Experience with ARM-based SoCs, interconnects, and ASIC methodology.
Preferred qualifications:
- Master’s degree in Electrical/Computer Engineering, or a related field.
- 15 years of experience with IP design for clocking, interconnects, and peripherals.
- Experience with methodologies for low power estimation, timing closure, and synthesis.
- Experience managing technical teams.
- Ability to drive multi-generational roadmap for IP/SoC development.
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