Amazon Senior Post Silicon Engineer 

United States, Texas, Austin 

376189946

In this Senior Post Silicon Engineer role, you will be a key contributor to a high-performance team focused on developing and validating MODEM SOC technologies. Your primary responsibilities will include designing and maintaining a scalable automation framework and collaborating with the Design Verification team to establish comprehensive bare metal testing infrastructure. By leveraging your technical expertise, you will play a crucial role in driving the successful bring-up and characterization of Kuiper MODEM SOC.Export Control Requirement
Key job responsibilities
• Design scalable automation framework for post-silicon testing and validation.
• Write maintainable, efficient, OOP Python scripts for automating bring-up, validation, and characterization tasks.
• Ensure proper version control using Git, including branching strategies and code reviews
• Set up and manage Continuous Integration and Continuous Deployment pipelines.
• Design instrument drivers for test equipment communication via USB and Ethernet interfaces.
• Develop automated reports using statistical analysis to generate actionable system performance insights.
• Design and manage hardware setups, including cabling and physical infrastructure to support efficient data gathering and hardware management.
• Maintain comprehensive documentation for the automation system, including user guides and troubleshooting procedures.

• Bachelor's degree in Computer Science, Computer Engineering, Electrical Engineering or equivalent.
• 8+ years of work experience in creating and maintaining automation framework to support Post-Silicon Flow.
• Proficiency in serial protocols like SPI, I2C, I3C, UART, etc.
• Proven experience with version control systems (Git) and CI/CD pipeline implementation
• Working knowledge of programming languages such as Python and Embedded C
• Demonstrated expertise in Bare Metal Environment (BME) development, including in-depth knowledge of linker scripts, page tables and the Nested-Vectored Interrupt Controller.

• 4+ years in low-level firmware development, memory management, and interrupt handling in resource-constrained embedded systems.
• Strong debugging and problem-solving skills in both bare metal and automated testing environments
• Experienced with bench-top test instruments across power, signal and data acquisition domains
• Expertise with JTAG-based debugging tools (e.g., Lauterbach)
• High sense of ownership, urgency, and drive; resourceful, and able to deliver results with minimal direction