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What you'll be doing:
Collaborate with other micro-architects and senior designers to propose and demonstrate the merit and limitations of innovative core CPU microarchitectural features to drive up performance per area per power on various targeted workloads.
Do the detailed performance modeling and debug, and studies to support inclusion of these features in the next generation core microarchitecture on the basis of performance, area or power improvement
Partner with design and verification leads to iterate through specification, implementation in RTL and verification of the microarchitecture features to achieve target functionality, performance, frequency, area, power and verifiability
Collaborate with Silicon Bring-up and Product teams to verify and debug the microarchitecture and its delivered performance
What we need to see:
B.Sc. / M.Sc. /PhDin Computer Engineering / Computer Science / Electrical Engineering or equivalent experience.
At least 3 years of software development experience in C++ and Python.
A track record of developing and maintaining SW systems.
Ways to stand out from the crowd:
Deep understanding in CPU core architecture and microarchitecture.
Prior experience in cycle accurate performance modeling.
Strong collaborative and interpersonal skills.
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