Nvidia Senior Custom SOC IP Verification Engineer 

India, Karnataka, Bengaluru 

36440512

Lead ASIC design verification for various processing blocks in a SOC, including planning, execution, Coverage and methodology development.

Collaborate with multiple teams (Architecture, SW/FW, Design, Modeling, Emulation, Post-Silicon Validation) to ensure comprehensive verification plans.

Support engineering teams in delivering solutions for purpose-built ASICs and collaborate with IP development teams for IP identification, selection, and licensing.

Analyze SOC and IP architecture, develop verification plans, and establish performance metrics.

Work with partners in a co-development environment during development, debug, and bringup.

Plan tests, achieve coverage closure, and enable customer TB infrastructure.

Validate use cases for power-on and boot requirements.

Proficient in design verification tools like Synopsys VCS, Cadence Xcelium Simulator, Verdi, JasperGold, and VC Formal.

Consistent track record of first-pass success in ASIC Development.

Holds a B.S. or M.S. degree in Computer Engineering or Electrical Engineering, with 7+ years of experience in ASIC, IP, or SoC design verification.

Skilled in handling mixed language UVM and C++ testbenches, interpreting functional specs, and building comprehensive test plans.

Experienced in developing tools and infrastructure using Perl or Python, with a strong background in AMBA protocols (AXI, ACE, CHI, ATB).

Hands-on experience with subsystems in new technologies like ARM CPU, LPDDR, HBM, GPUs, DLA, PCIe, and Network on chip, including performance verification.