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Apple ASIC Design Engineer United States, California, Cupertino 360736120
03.08.2025
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Design and Development: Design, implementation, and verification of complex ASICs. Develop RTL using SystemVerilog and perform synthesis.Timing and Power Analysis: Conduct timing analysis and power optimization to achieve PPA goals.Documentation and Reporting: Create detailed micro-architecture and design documentation.
- Education: Bachelor's Degree with +10 Years of Experience.
- Experience: ASIC design, including RTL design and verification. Hands-on experience with ASIC design tools and methodologies is essential.
- Technical Skills: Proficiency in SystemVerilog, RTL design, synthesis, and timing analysis.
- Problem-Solving: Strong analytical and problem-solving skills.
- Collaboration: Excellent communication and teamwork skills, work effectively in cross-functional teams.
- Attention to Detail: Meticulous attention to detail and a commitment to delivering high-quality designs.
- Experience with high-speed I/O design and protocols. Knowledge of PCIe is a plus.
- Familiarity with custom ASIC design and FPGA prototyping.
- Hands on experience in all aspects of front-end chip development process (e.g., CDC/RDC, LINT, LEC, etc.).
- Knowledge of low-power design techniques and power optimization strategies.
Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
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