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Apple CAD Extraction Engineer F Germany, Bavaria, Munich 360598620
28.03.2024
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Key Qualifications
- Are familiar with post-layout custom design flow, including LVS, Extraction, and Simulations.
- Bring experience as a power user or developer with extraction tools like StarRC and Quantus.
- Have a deep understanding of cellular/wireless design RC accuracy investigation, reduction methods, and simulation impact.
- Have skills in sophisticated script development using Shell, Perl, Python, and TCL.
- Understand foundry PDK collaterals and usage in individual flows.
- Bring a general problem-solving attitude and positive teamwork.
- Experience in general big data analysis is a plus.
- Ability to fluently speak and write in English.
Description
As a member of our CAD team, you will develop, maintain, and enhance existing parasitics extraction flow for Apple’s successful silicon designs. You will use the most efficient RC analysis skills on various designs to diagnose and debug parasitic effects and guide and design improvement for balanced and minimized parasitic impact. Your experience and proficient usage of EDA extraction tools and methodologies will ensure parasitic RLC accuracy and circuit performance in post-layout simulations. You must deeply understand parasitic modeling in advanced process technologies and use the knowledge to explain circuit behavior and performance. You will work closely with EDA vendors to incorporate new capabilities to solve technical problems. You can develop an RC-aware or RC-driven methodology for design optimization.
Education & Experience
BS/MS degree in a relevant technical field like Electrical Engineering.
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