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Apple STA Engineer United States, California, Cupertino 35384812
28.03.2024
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Key Qualifications
- Strong fundamentals in the area of Digital design
- Self-starter and highly motivated
- Familiarity in scripting languages such as Python or TCL or Perl
- Familiarity with ASIC design timing concepts
- Exposure in STA tools (Primetime) is a plus
- Familiarity with front end tools and methodologies such as Synthesis, Logic equivalence checks
- Knowledge of timing corners/modes, process variations and signal integrity related issues is a plus
- Ability to communicate optimally across all internal groups
Description
As an ASIC STA Engineer, you will have responsibilities spanning various aspects of SOC design: Full chip and block level timing closure ownership throughout the entire project. Develop and maintain methodology and flows related to timing verification and closure. Generation of block and full chip timing constraints. Work on Apple SoC (System-on-Silicon) chips in deep sub-micron technologies targeted for high end mobile applications. Work closely with various multi-functional teams on resolving complex timing issues for major building blocks of complex SoCs.
Education & Experience
Bachelors Degree + 0 Years of Experience
Pay & Benefits
- At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $55.82 and $84.09/hr, and your base pay will depend on your skills, qualifications, experience, and location.Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
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