Microsoft Director Physical Design 

United States, California, Mountain View 

353724263

cutting edgeDirector ofand Surface silicon productswell testchips incutting edgewith the ability to lead otherstechnical environment.

Required/Minimum Qualifications

• 9+ years of related technical engineering experience
  • OR Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 5+ years technical engineering experience or internship experience
  • OR Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience
  • OR Doctorate degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 2+ years technical engineering experience.
• 8+ years of experience in hardware design
• 3+ years of experience managing a design team

Other Requirements

• Abilityto meet Microsoft, customer and/or government security screening requirementsarerequired for this role. These requirements include but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter.

Additional or Preferred Qualifications

• 15+ years technical engineering experience
  • OR Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 12+ years technical engineering experience
  • OR Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 8+ years technical engineering experience
  • OR Doctorate degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 5+ years technical engineering experience.
• 8+ years of experience inRTL-to-GDS tasks such asfloorplanning, bump planning,synthesis,timingclosure,place-and-route,electromigration & voltage drop, and physical verification

Certain roles may be eligible for benefits and other compensation. Find additional benefits and pay information here:

• Principal Physical Design, responsible for:
  • Providing technical direction and managing deliverables of a team of Physical Design (PD) and implementation engineers.
  • Overseeing a diverse set of projects, including soft IP (intellectual property), test chips, and mixed-signal IP development.

• Responsibilities :

  • Soft IP Projects : Ensure IPs meet timing, power, and area targets.
  • Test Chips : Manage all aspects of physical design, including:
    • Floorplanning, bump and Electrostatic Discharge (ESD) planning.
    • Synthesis, place-and-route, clock tree synthesis (CTS).
    • Signoff for timing, electromigration, voltage drop, and physical verification.
  • Mixed-Signal IP : Integrate complex analog IPs within a digital system, acting as a key interface between IP and System on Chip (SoC).
  • Signoff Responsibility : Review signoff quality metrics prior to IP shipment and SoC tapeout.
  • Collaboration : Work closely with packaging engineers on IP requirements for 2D, 2.5D, and 3D packaging options.
  • Communication : Strong skills needed to coordinate with Register Transfer Level (RTL), Design for Testability (DFT), Computer-Aided Design (CAD), and SoC teams.

• Leadership :

  • Provide technical direction to less-experienced physical design engineers.
  • Work with limited direction and attention to detail.
  • Provide clear status updates on progress, issues, and risks to management.