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QT Technologies Ireland Limited
Job Area:
Engineering Group, Engineering Group > ASICS Engineering
Responsibilities will include the following:
RTL to GDS2 flow, tools and methodologies such as synthesis, static timing analysis, formal verification, physical design and ECO generation/verification :
Implementation and delivery of GPU cores from RTL to GDSII
Identify areas for flow and process improvements
RTL synthesis using physically aware tools
Formal Verification using industry standard tools for RTL-netlist and netlist-netlist checks
Close design timing by running static timing analysis and constraint development
Generate and verify ECOs for functional and timing fixes, working closely with the physical design team
Low Power synthesis flows for multiple corners
synthesis, static timing, timing closure, constraints and formal verification
EDA tools such as Synopsys Next Generation tools, Conformal LEC, Synopsys Formality and Synopsys PrimeTime
EDA tools for synthesis, logic equivalence checking, timing Analysis, physical design
Able to problem solve complex, unique and detailed issues
Experience in Synthesis or Physical Design Flows, CAD tool development
Develop complex SW for design implementation in Python, Perl, Shell and Tcl
Skills:
Synthesis
Place and Route
Static timing analysis
Clocking
Power Grid architecture
High performance designs.
Where you will be working
A gateway to Europe, Cork airport provides access to almost 50 international destinations including transatlantic air routes.
What's on Offer
Apart from working in an open, relaxed and collaborative space, you will enjoy:
Salary, stock and performance related bonus
Maternity/Paternity Leave
Employee stock purchase scheme
Matching pension scheme
Education Assistance
Relocation and immigration support (if needed)
Life, Medical, Income and Travel Insurance
Subsidised memberships for physical and mental well-being
Bicycle purchase scheme
Employee run clubs, including, running, football, chess, badminton + many more
Minimum Qualifications:
• Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.
PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
*References to a particular number of years experience are for indicative purposes only. Applications from candidates with equivalent experience will be considered, provided that the candidate can demonstrate an ability to fulfill the principal duties of the role and possesses the required competencies.
Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.
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