You will be part of ACE India , in the P- Core design team driving Intel's latest CPU's in the latest process technology.
In this position, you will be responsible for timing analysis and convergence of complex partitions.
Your responsibilities will include but not limited to:
Responsible for timing execution and convergence including setup and hold for over 5GHz Freq and low-power digital designs.
Deep understanding of Static timing analysis concepts
Timing Convergence across all HVM targets4. Closely work with SD, Integration and Floor plan teams
Qualifications:
You must possess a Masters Degree in Electrical or Electronics Engineering with at least 6 or more years of experience in related field or a Bachelor's Degree with at least 8 years of experience. Technical Expertise in Static Timing Analysis is preferred.
Preferred additional skills :
Experience of handle complex core design, high-speed designs