You will be designing the hardware for the Cisco 8000 series routers to deliver the best quality and best power efficiency using groundbreaking serdes technology at the highest bit rates possible. Your responsibilities will span from hardware definition to design, and from qualification to final product release to our customers.
Primary responsibilities:
Use Cadence/Allegro to develop and collect schematics.
Guide layout and routing phase of the design.
Write hardware specs, develop test plans, bring up hardware with ASIC teams.
Debug issues the lab using analyzers, scopes.
Minimum Qualifications:
Bachelors in Electrical or Computer Engineering.
6+ years experience in system level development
Experience in Ethernet, high speed serdes (>10G) interfaces, high speed design and/or signal integrity.
Board design knowledge, example: familiar with design tools including Cadence Concept and/or Allegro.
Experience with lab bring up and design validation of products.
Prior experience with shipping products.
Preferred Qualifications:
Masters in Electrical Engineering preferred
Experience preferably in the server/computer/network industry
Experience in X86 architecture, and a very good understanding of control interfaces such as PCIe, MDIO, SPI, I2C.
Hard-working with the ability to map high level requirements into actionable achievements.
Excellent verbal and written communications skills.
Ability to collaborate with other subject areas, including software, mechanical and signal integrity.
We tackle whatever challenges come our way. We have each other’s backs, we recognize our accomplishments, and we grow together. We celebrate and support one another – from big and small things in life to big career moments. And giving back is in our DNA (we get 10 days off each year to do just that).
This role requires being onsite in San Jose, CA.
Application window is expected to close 8/26/24