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What you will be doing:
Join Beer-Sheva group, working onRiscV processors platform.
Verification for chip blocksaccording to specifications under challenging constraints and with high orientation to power, area and performance.
Daily work will involve design and might involve any or all aspects of chip development including micro-architecture, dv…
Work closely with firmware and other groups around the globe.
What we need to see:
B.SC./M.SC. or equivalent experience in ElectricalEngineering/CommunicationEngineering/Computer Engineering
5+ years of validated experience in RTL Frontend ASIC Verification (Chip Design)
High Level of English
Ways to stand out from the crowd:
Extensive years of experience in RTL Frontend ASIC Verification (Chip Design)
Strong experience and knowledge in Specman
Vast background and knowledge in system level aspects
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