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E-Core CPUs are the industry leading performance per watt CPU that helps:
Power the latest Intel laptops, desktops and high-end gaming platforms.
Drive 5G communications by serving as the base-station that delivers essential data from your electronic devices across the world at maximum bandwidth.
Create Artificial Intelligence (AI) and machine learning devices.
Enables a full virtual learning experience for students using the latest Google Chromebooks
Who You Are
As a CAD Physical Design Engineer in the E-core CPU group, you will be responsible for:
Developing, debugging, and supporting tools, flows and methodologies covering backend physical design methodologies and flow automation for high performance blocks and full chip level using RTL2GDS standard cell level design techniques.
Performing analysis of either synthesis, place and route, floor planning or signoff for static timing analysis on timing paths, formal equivalence verification, power consumption, electrical rule checking and circuit reliability to identify key issues.
Working closely with design teams to understand and debug tool issues and constraints.
Working with industry EDA vendors to build and enhance tool capabilities to design a high-speed, low-power synthesizable CPU.
Creating documentation and help with guidelines/specs.
Communicate with other team members to solve problems and following solutions through to completion Excellent verbal and written English communication skills
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your schoolwork/classes/research and/or relevant previous job and/or internship experiences.
Minimum Qualifications
Bachelor's Degree in Computer Engineering and/or Electrical Engineering and 2+ years of relevant working experience OR Master's Degree in Computer Engineering and/or Electrical Engineering in Computer Engineering and/or Electrical Engineering OR
Coursework and/or 3+ months experience in VLSI, design automation algorithms, and transistor-level design
Coursework and/or 3+ months experience using industry standard Engineering Design Automation (EDA) VLSI tools/flows from vendors such as Synopsys, Cadence and/or Mentor Graphics for performing synthesis, place-and-route, extraction, timing/power analysis and functional verification.
1+ years’ experience with Python, Perl, and/or Tcl scripting languages.
Preferred Qualifications
1+ years of relevant working experience in microprocessor or other high speed design backend design.
Experience with timing closure methodology for worst-case corner (static timing analysis / STA, statistical variation analysis, spice circuit simulation, ERC, noise analysis flows, cross talk, OCV effects, budget constraints)
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